High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware Design

Petr Matousek, Ales Smrcka, Tomás Vojnar. High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware Design. In Dominique Borrione, Wolfgang J. Paul, editors, Correct Hardware Design and Verification Methods, 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedings. Volume 3725 of Lecture Notes in Computer Science, pages 371-375, Springer, 2005. [doi]

Abstract

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