A simple switched-capacitor algorithmic digital-to-analog converter using sample/hold and divider

Hiroki Matsumoto. A simple switched-capacitor algorithmic digital-to-analog converter using sample/hold and divider. In 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014, Ishigaki, Japan, November 17-20, 2014. pages 45-48, IEEE, 2014. [doi]

Abstract

Abstract is missing.