Shizunori Matsumoto, Hans Jürgen Mattausch, S. Ooshiro, Y. Tatsumi, Mitiko Miura-Mattausch, Shigetaka Kumashiro, Terufumi Yamaguchi, Kyoji Yamashita, Noriaki Nakayama. Test-circuit-based extraction of inter- and intra-chip MOSFET-performance variations for analog-design reliability. In Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, CICC 2001, San Diego, CA, USA, May 6-9, 2001. pages 357-360, IEEE, 2001. [doi]
Abstract is missing.