Hiroki Matsutani, Michihiro Koibuchi, Daisuke Ikebuchi, Kimiyoshi Usami, Hiroshi Nakamura, Hideharu Amano. Ultra Fine-Grained Run-Time Power Gating of On-chip Routers for CMPs. In NOCS 2010, Fourth ACM/IEEE International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010. pages 61-68, IEEE Computer Society, 2010. [doi]
@inproceedings{MatsutaniKIUNA10,
title = {Ultra Fine-Grained Run-Time Power Gating of On-chip Routers for CMPs},
author = {Hiroki Matsutani and Michihiro Koibuchi and Daisuke Ikebuchi and Kimiyoshi Usami and Hiroshi Nakamura and Hideharu Amano},
year = {2010},
doi = {10.1109/NOCS.2010.16},
url = {http://doi.ieeecomputersociety.org/10.1109/NOCS.2010.16},
tags = {routing},
researchr = {https://researchr.org/publication/MatsutaniKIUNA10},
cites = {0},
citedby = {0},
pages = {61-68},
booktitle = {NOCS 2010, Fourth ACM/IEEE International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010},
publisher = {IEEE Computer Society},
isbn = {978-0-7695-4053-5},
}