Low power analysis of DLX processor datapath using a novel clocking scheme

Rajesh Kannan Megalingam, S. Hassan, T. Rao, A. Mohan, V. Perieye. Low power analysis of DLX processor datapath using a novel clocking scheme. In B. K. Mishra, editor, Proceedings of the ICWET 10 International Conference & Workshop on Emerging Trends in Technology, Mumbai, Maharashtra, India, February 26 - 27, 2010. pages 874-879, ACM, 2010. [doi]

Abstract

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