High-performance noise tolerant comparator design for arithmetic circuits

Preetisudha Meher, Kamala Kanta Mahapatra. High-performance noise tolerant comparator design for arithmetic circuits. In International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2016, Phuket, Thailand, October 24-27, 2016. pages 1-4, IEEE, 2016. [doi]

Abstract

Abstract is missing.