Vinod Menezes, C. B. Keshav, Sushil Gupta, M. Roopashree, S. Krishnan, A. Amerasekera, G. Palau. Optimization of 1.8V I/O circuits for performance, reliability at the 100nm technology node. In 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India. pages 122-127, IEEE Computer Society, 2003. [doi]
Abstract is missing.