Jeremy Metairie, Arnaud Tisserand, Emmanuel Casseau. Small FPGA Based Multiplication-Inversion Unit for Normal Basis Representation in GF(2m). In 2015 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2015, Montpellier, France, July 8-10, 2015. pages 440-445, IEEE Computer Society, 2015. [doi]
Abstract is missing.