Estimating the Maximum Propagation Delay of 4-bit Ripple Carry Adder Using Reduced Input Transitions

Manan Mewada, Mazad Zaveri, Anurag Lakhlani. Estimating the Maximum Propagation Delay of 4-bit Ripple Carry Adder Using Reduced Input Transitions. In Brajesh Kumar Kaushik, Sudeb Dasgupta, Virendra Singh, editors, VLSI Design and Test - 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers. Volume 711 of Communications in Computer and Information Science, pages 15-23, Springer, 2017. [doi]

@inproceedings{MewadaZL17,
  title = {Estimating the Maximum Propagation Delay of 4-bit Ripple Carry Adder Using Reduced Input Transitions},
  author = {Manan Mewada and Mazad Zaveri and Anurag Lakhlani},
  year = {2017},
  doi = {10.1007/978-981-10-7470-7_2},
  url = {https://doi.org/10.1007/978-981-10-7470-7_2},
  researchr = {https://researchr.org/publication/MewadaZL17},
  cites = {0},
  citedby = {0},
  pages = {15-23},
  booktitle = {VLSI Design and Test - 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers},
  editor = {Brajesh Kumar Kaushik and Sudeb Dasgupta and Virendra Singh},
  volume = {711},
  series = {Communications in Computer and Information Science},
  publisher = {Springer},
  isbn = {978-981-10-7470-7},
}