A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Laurent Millet, Stéphane Chevobbe, Caaliph Andriamisaina, Edith Beigné, Fabrice Guellec, Thomas Dombek, L. Benaissa, E. Deschaseaux, M. Duranton, K. Benchehida, Mehdi Darouich, Maria Lepecq. A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing. In 2018 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, June 18-22, 2018. pages 245-246, IEEE, 2018. [doi]

This author has not been identified. Look up 'Laurent Millet' in GoogleThis author has not been identified. Look up 'Stéphane Chevobbe' in GoogleThis author has not been identified. Look up 'Caaliph Andriamisaina' in GoogleThis author has not been identified. Look up 'Edith Beigné' in GoogleThis author has not been identified. Look up 'Fabrice Guellec' in GoogleThis author has not been identified. Look up 'Thomas Dombek' in GoogleThis author has not been identified. Look up 'L. Benaissa' in GoogleThis author has not been identified. Look up 'E. Deschaseaux' in GoogleThis author has not been identified. Look up 'M. Duranton' in GoogleThis author has not been identified. Look up 'K. Benchehida' in GoogleThis author has not been identified. Look up 'Mehdi Darouich' in GoogleThis author has not been identified. Look up 'Maria Lepecq' in Google

runs on WebDSL