A Speed-Up Technique for Synchronous Circuits Realized as LUT-Based FPGAs

Toshiaki Miyazaki, Hiroshi Nakada, Akihiro Tsutsui, Kazuhisa Yamada, Naohisa Ohta. A Speed-Up Technique for Synchronous Circuits Realized as LUT-Based FPGAs. In Reiner W. Hartenstein, Michal ServĂ­t, editors, Field-Programmable Logic, Architectures, Synthesis and Applications, 4th International Workshop on Field-Programmable Logic and Applications, FPL 94, Prague, Czech Republic, September 7-9, 1994, Proceedings. Volume 849 of Lecture Notes in Computer Science, pages 89-98, Springer, 1994.

Abstract

Abstract is missing.