Logic BIST With Capture-Per-Clock Hybrid Test Points - researchr publication

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Elham K. Moghaddam, Nilanjan Mukherjee 0001, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer, Justyna Zawada. Logic BIST With Capture-Per-Clock Hybrid Test Points. IEEE Trans. on CAD of Integrated Circuits and Systems, 38(6):1028-1041, 2019. [doi]

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