A power minimized 74 fJ/conversion-step 88.6 dB SNR incremental ΣΔ ADC with an asynchronous SAR quantizer

Saqib Mohamad, Chao Wu, Jie Yuan, Amine Bermak. A power minimized 74 fJ/conversion-step 88.6 dB SNR incremental ΣΔ ADC with an asynchronous SAR quantizer. In IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017. pages 1-4, IEEE, 2017. [doi]

Abstract

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