A 128 kb single-bitline 8.4 fJ/bit 90MHz at 0.3V 7T sense-amplifierless SRAM in 28 nm FD-SOI - researchr publication related

researchr

You are not signed in
Sign in
Sign up

Babak Mohammadi, Oskar Andersson, Joseph Nguyen, Lorenzo Ciampolini, Andreia Cathelin, Joachim Neves Rodrigues. A 128 kb single-bitline 8.4 fJ/bit 90MHz at 0.3V 7T sense-amplifierless SRAM in 28 nm FD-SOI. In nd European Solid-State Circuits Conference, Lausanne, Switzerland, September 12-15, 2016. pages 429-432, IEEE, 2016. [doi]

The following publications are possibly variants of this publication:

A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD-SOIBabak Mohammadi, Oskar Andersson, Joseph Nguyen, Lorenzo Ciampolini, Andreia Cathelin, Joachim Neves Rodrigues. tcas, 65-I(4):1257-1268, 2018. [doi]

A Low-Voltage 6T Dual-Port Configured SRAM with Wordline Boost in 28 nm FD-SOIMasoud Nouripayam, Joachim Rodrigues, Xiao Luo, Tom Johansson, Babak Mohammadi. esscirc 2021: 459-462 [doi]

runs on WebDSL