Unified Challenges in Nano-CMOS High-Level Synthesis

Saraju P. Mohanty. Unified Challenges in Nano-CMOS High-Level Synthesis. In VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009. pages 531, IEEE, 2009. [doi]

Abstract

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