Merged-Cascaded Systolic Array for VLSI Implementation of Discrete Wavelet Transform

Basant K. Mohanty, Pramod Kumar Meher. Merged-Cascaded Systolic Array for VLSI Implementation of Discrete Wavelet Transform. In IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006. pages 462-465, IEEE, 2006. [doi]

Abstract

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