350nm CMOS test-chip for architecture verification of real-time QVGA color-video segmentation at the 90nm technology node

Takashi Morimoto, Yohmei Harada, Tetsushi Koide, Hans Jürgen Mattausch. 350nm CMOS test-chip for architecture verification of real-time QVGA color-video segmentation at the 90nm technology node. In Masaharu Imai, editor, Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004. pages 531-532, IEEE, 2004. [doi]

Abstract

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