Performance limit of parallel electric field tunnel FET and improvement by modified gate and channel configurations

Yukinori Morita, T. Mori, Shinji Migita, Wataru Mizubayashi, A. Tanabe, K. Fukuda, Takashi Matsukawa, Kazuhiko Endo, Shin-ichi O'Uchi, Y. X. Liu, Meishoku Masahara, Hiroyuki Ota. Performance limit of parallel electric field tunnel FET and improvement by modified gate and channel configurations. In Proceedings of the European Solid-State Device Research Conference, ESSDERC 2013, Bucharest, Romania, September 16-20, 2013. pages 45-48, IEEE, 2013. [doi]

Abstract

Abstract is missing.