BZ-FAD: A Low-Power Low-Area Multiplier Based on Shift-and-Add Architecture

M. Mottaghi-Dastjerdi, Ali Afzali-Kusha, Massoud Pedram. BZ-FAD: A Low-Power Low-Area Multiplier Based on Shift-and-Add Architecture. IEEE Trans. VLSI Syst., 17(2):302-306, 2009. [doi]

Abstract

Abstract is missing.