The design and implementation of a low-latency on-chip network

Robert D. Mullins, Andrew West, Simon W. Moore. The design and implementation of a low-latency on-chip network. In Fumiyasu Hirose, editor, Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006. pages 164-169, IEEE, 2006. [doi]

Abstract

Abstract is missing.