Variability-Tolerant Register-Transfer Level Synthesis

Anish Muttreja, Srivaths Ravi, Niraj K. Jha. Variability-Tolerant Register-Transfer Level Synthesis. In 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India. pages 621-628, IEEE Computer Society, 2008. [doi]

Abstract

Abstract is missing.