Statistical Run-Time Verification of Analog Circuits in Presence of Noise and Process Variation

Rajeev Narayanan, Ibtissem Seghaier, Mohamed H. Zaki, Sofiène Tahar. Statistical Run-Time Verification of Analog Circuits in Presence of Noise and Process Variation. IEEE Trans. VLSI Syst., 21(10):1811-1822, 2013. [doi]

Abstract

Abstract is missing.