Increasing minimum operating voltage (V::DDmin::) with number of CMOS logic gates and experimental verification with up to 1Mega-stage ring oscillators

Taro Niiyama, Piao Zhe, Koichi Ishida, Masami Murakata, Makoto Takamiya, Takayasu Sakurai. Increasing minimum operating voltage (V::DDmin::) with number of CMOS logic gates and experimental verification with up to 1Mega-stage ring oscillators. In Vijaykrishnan Narayanan, C. P. Ravikumar, Jörg Henkel, Ali Keshavarzi, Vojin G. Oklobdzija, Barry M. Pangrle, editors, Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008, Bangalore, India, August 11-13, 2008. pages 117-122, ACM, 2008. [doi]

Abstract

Abstract is missing.