Performance Predictions for Speculative, Synchronous, VLSI Logic Simulation

Bradley L. Noble, J. Cris Wade, Roger D. Chamberlain. Performance Predictions for Speculative, Synchronous, VLSI Logic Simulation. In Proceedings 34th Annual Simulation Symposium (SS 2001), Seattle, WA, USA, 22-26 April 2001. pages 56-64, IEEE Computer Society, 2001. [doi]

Abstract

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