Synthesis of asynchronous circuits for stuck-at and robust path delay fault testability

Steven M. Nowick, Niraj K. Jha, Fu-Chiung Cheng. Synthesis of asynchronous circuits for stuck-at and robust path delay fault testability. IEEE Trans. on CAD of Integrated Circuits and Systems, 16(12):1514-1521, 1997. [doi]

Abstract

Abstract is missing.