Daesun Oh, Keshab K. Parhi. Efficient Highly-Parallel Decoder Architecture for Quasi-Cyclic Low-Density Parity-Check Codes. In International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA. pages 1855-1858, IEEE, 2007. [doi]
Abstract is missing.