Design Optimization for Process-Variation-Tolerant 22-nm FinFET-Based 6-T SRAM Cell with Worst-Case Sampling Method

Sangheon Oh, Changhwan Shin. Design Optimization for Process-Variation-Tolerant 22-nm FinFET-Based 6-T SRAM Cell with Worst-Case Sampling Method. IEICE Transactions, 99-C(5):541-543, 2016. [doi]

@article{OhS16,
  title = {Design Optimization for Process-Variation-Tolerant 22-nm FinFET-Based 6-T SRAM Cell with Worst-Case Sampling Method},
  author = {Sangheon Oh and Changhwan Shin},
  year = {2016},
  url = {http://search.ieice.org/bin/summary.php?id=e99-c_5_541},
  researchr = {https://researchr.org/publication/OhS16},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {99-C},
  number = {5},
  pages = {541-543},
}