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Martin OmaƱa, Daniele Rossi, Filippo Fuzzi, Cecilia Metra, Chandra Tirumurti, Rajesh Galivanche. Scalable Approach for Power Droop Reduction During Scan-Based Logic BIST. IEEE Trans. VLSI Syst., 25(1):238-246, 2017. [doi]
Abstract is missing.