A system-level power-estimation methodology based on IP-level modeling, power-level adjustment, and power accumulation

Masafumi Onouchi, Tetsuya Yamada, Kimihiro Morikawa, Isamu Mochizuki, Hidetoshi Sekine. A system-level power-estimation methodology based on IP-level modeling, power-level adjustment, and power accumulation. In Fumiyasu Hirose, editor, Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006. pages 547-550, IEEE, 2006. [doi]

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