Post-layout optimization of power and timing for ECL LSIs

Akira Onozawa, Hitoshi Kitazawa, K. Kawai. Post-layout optimization of power and timing for ECL LSIs. In 1995 European Design and Test Conference, ED&TC 1995, Paris, France, March 6-9, 1995. pages 167-172, IEEE Computer Society, 1995. [doi]

Abstract

Abstract is missing.