An on-chip 250 mA 40 nm CMOS digital LDO using dynamic sampling clock frequency scaling with offset-free TDC-based voltage sensor

Kazuo Otsuga, Masafumi Onouchi, Yasuto Igarashi, Toyohito Ikeya, Sadayuki Morita, Koichiro Ishibashi, Kazumasa Yanagisawa. An on-chip 250 mA 40 nm CMOS digital LDO using dynamic sampling clock frequency scaling with offset-free TDC-based voltage sensor. In IEEE 25th International SOC Conference, SOCC 2012, Niagara Falls, NY, USA, September 12-14, 2012. pages 11-14, IEEE, 2012. [doi]

@inproceedings{OtsugaOIIMIY12,
  title = {An on-chip 250 mA 40 nm CMOS digital LDO using dynamic sampling clock frequency scaling with offset-free TDC-based voltage sensor},
  author = {Kazuo Otsuga and Masafumi Onouchi and Yasuto Igarashi and Toyohito Ikeya and Sadayuki Morita and Koichiro Ishibashi and Kazumasa Yanagisawa},
  year = {2012},
  doi = {10.1109/SOCC.2012.6398369},
  url = {http://dx.doi.org/10.1109/SOCC.2012.6398369},
  researchr = {https://researchr.org/publication/OtsugaOIIMIY12},
  cites = {0},
  citedby = {0},
  pages = {11-14},
  booktitle = {IEEE 25th International SOC Conference, SOCC 2012, Niagara Falls, NY, USA, September 12-14, 2012},
  publisher = {IEEE},
  isbn = {978-1-4673-1294-3},
}