Scan Design Oriented Test Technique for VLSI s Using ATE - researchr publication

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Yasuji Oyama, Toshinobu Kanai, Hironobu Niijima. Scan Design Oriented Test Technique for VLSI s Using ATE. In Proceedings IEEE International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996. pages 453-460, IEEE Computer Society, 1996.

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