Increment/decrement/2's complement/priority encoder circuit for varying operand lengths

Sai Phaneendra P., Chetan Vudadha, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas. Increment/decrement/2's complement/priority encoder circuit for varying operand lengths. In 11th International Symposium on Communications and Information Technologies, ISCIT 2011, Hangzhou, China, October 12-14, 2011. pages 472-477, IEEE, 2011. [doi]

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