3-D integration and the limits of silicon computation

Dinesh Pamunuwa, Matthew Grange, Roshan Weerasekera, Axel Jantsch. 3-D integration and the limits of silicon computation. In IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, VLSI-SoC 2011, Kowloon, Hong Kong, China, October 3-5, 2011. pages 343-348, IEEE, 2011. [doi]

Abstract

Abstract is missing.