Design and Implementation of Viterbi Decoder Using FPGAs

Bupesh Pandita, Subir K. Roy. Design and Implementation of Viterbi Decoder Using FPGAs. In 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India. pages 611, IEEE Computer Society, 1999. [doi]

Abstract

Abstract is missing.