A low latency kernel recursive least squares processor using FPGA technology

Yeyong Pang, Shaojun Wang, Yu Peng, Nicholas J. Fraser, Philip H. W. Leong. A low latency kernel recursive least squares processor using FPGA technology. In 2013 International Conference on Field-Programmable Technology, FPT 2013, Kyoto, Japan, December 9-11, 2013. pages 144-151, IEEE, 2013. [doi]

@inproceedings{PangWPFL13,
  title = {A low latency kernel recursive least squares processor using FPGA technology},
  author = {Yeyong Pang and Shaojun Wang and Yu Peng and Nicholas J. Fraser and Philip H. W. Leong},
  year = {2013},
  doi = {10.1109/FPT.2013.6718345},
  url = {http://dx.doi.org/10.1109/FPT.2013.6718345},
  researchr = {https://researchr.org/publication/PangWPFL13},
  cites = {0},
  citedby = {0},
  pages = {144-151},
  booktitle = {2013 International Conference on Field-Programmable Technology, FPT 2013, Kyoto, Japan, December 9-11, 2013},
  publisher = {IEEE},
}