2 38-mW 1.5-Gb/s LDPC decoder enabled by refresh-free embedded DRAM

Youn Sung Park, David Blaauw, Dennis Sylvester, Zhengya Zhang. 2 38-mW 1.5-Gb/s LDPC decoder enabled by refresh-free embedded DRAM. In Symposium on VLSI Circuits, VLSIC 2012, Honolulu, HI, USA, June 13-15, 2012. pages 114-115, IEEE, 2012. [doi]

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