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A 512-mb DDR3 SDRAM prototype with C/sub IO/ minimization and self-calibration techniques

Churoo Park, Hoeju Chung, Yun Sang Lee, Jaekwan Kim, Jaejun Lee, Moo Sung Chae, Dae-Hee Jung, Sung Ho Choi, Seung-young Seo, Taek-Seon Park, Jun Ho Shin, Jin Hyung Cho, Seunghoon Lee, Ki-Whan Song, Kyu-hyoun Kim, Jung-Bae Lee, Changhyun Kim, Soo-In Cho. A 512-mb DDR3 SDRAM prototype with C/sub IO/ minimization and self-calibration techniques. J. Solid-State Circuits, 41(4):831-838, 2006. [doi]

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