A Semi-Digital Delay Locked Loop for Clock Skew Minimization

Joonbae Park, Yido Koo, Wonchan Kim. A Semi-Digital Delay Locked Loop for Clock Skew Minimization. In 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India. pages 584-588, IEEE Computer Society, 1999. [doi]

Abstract

Abstract is missing.