A design-flow for high-level synthesis and resource estimation of reconfigurable architectures

Muhammad Adeel Pasha, Bilal Siddiqui, Umer Farooq. A design-flow for high-level synthesis and resource estimation of reconfigurable architectures. In 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, DTIS 2015, Napoli, Italy, April 21-23, 2015. pages 1-6, IEEE, 2015. [doi]

Abstract

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