Fast Parallel-Prefix Architectures for Modulo 2n-1 Addition with a Single Representation of Zero

Riyaz A. Patel, Mohammed Benaissa, Said Boussakta. Fast Parallel-Prefix Architectures for Modulo 2n-1 Addition with a Single Representation of Zero. IEEE Transactions on Computers, 56(11):1484-1492, 2007. [doi]

Abstract

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