Implementation of write relocatable coherency protocol in multiple processor architectures - researchr publication

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Parimal Patel, Venkataramana Reddipalli. Implementation of write relocatable coherency protocol in multiple processor architectures. In C. C. Hung, editor, Proceedings of the ISCA 16th International Conference Computers and Their Applications, March 28-30, 2001, Seattle, Washington, USA. pages 511-516, ISCA, 2001.

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