An 11.1 mW 42 MS/s 10 b ADC With Two-Step Settling in 0.18 μ m CMOS

Charles T. Peach, Un-Ku Moon, David J. Allstot. An 11.1 mW 42 MS/s 10 b ADC With Two-Step Settling in 0.18 μ m CMOS. J. Solid-State Circuits, 45(2):391-400, 2010. [doi]

Abstract

Abstract is missing.