Ke Peng, Mahmut Yilmaz, Mohammad Tehranipoor. Circuit Path Grading Considering Layout, Process Variations, and Cross Talk. In Sandeep Kumar Goel, Krishnendu Chakrabarty, editors, Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits. pages 95-118, CRC Press, 2014.
Abstract is missing.