Design of cost-efficient multipliers modulo 2:::a:::-1

Stanislaw J. Piestrak. Design of cost-efficient multipliers modulo 2:::a:::-1. In International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France. pages 4093-4096, IEEE, 2010. [doi]

Abstract

Abstract is missing.