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Efficiency Optimization of Silicon Photonic Links in 65-nm CMOS and 28-nm FDSOI Technology Nodes

Robert Polster, Yvain Thonnart, Guillaume Waltener, Jose-Luis Gonzalez Jimenez, Eric Cassan. Efficiency Optimization of Silicon Photonic Links in 65-nm CMOS and 28-nm FDSOI Technology Nodes. IEEE Trans. VLSI Syst., 24(12):3450-3459, 2016. [doi]

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