Michael D. Powell, Arijit Biswas, Shantanu Gupta, Shubhendu S. Mukherjee. Architectural core salvaging in a multi-core processor for hard-error tolerance. In Stephen W. Keckler, Luiz André Barroso, editors, 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA. pages 93-104, ACM, 2009. [doi]
Abstract is missing.