Sequential Fault Modeling and Test Pattern Generation for CMOS Iterative Logic Arrays

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian. Sequential Fault Modeling and Test Pattern Generation for CMOS Iterative Logic Arrays. IEEE Transactions on Computers, 49(10):1083-1099, 2000. [doi]

Abstract

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