Validating the performance of a 32nm CMOS high speed serial link receiver with adaptive equalization and baud-rate clock data recovery

Sudeep Puligundla, Fulvio Spagna, Lidong Chen, Amanda Tran. Validating the performance of a 32nm CMOS high speed serial link receiver with adaptive equalization and baud-rate clock data recovery. In Ron Press, Erik H. Volkerink, editors, 2011 IEEE International Test Conference, ITC 2010, Austin, TX, USA, November 2-4, 2010. pages 405-409, IEEE, 2010. [doi]

Abstract

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