Implementing Caches in a 3D Technology for High Performance Processors

Kiran Puttaswamy, Gabriel H. Loh. Implementing Caches in a 3D Technology for High Performance Processors. In 23rd International Conference on Computer Design (ICCD 2005), 2-5 October 2005, San Jose, CA, USA. pages 525-532, IEEE Computer Society, 2005. [doi]

Abstract

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